In recent years, there are proposed many semiconductor memory devices in which memory cells are disposed three-dimensionally in order to increase a degree of integration of memory.
One conventional semiconductor memory device in which memory cells are disposed three-dimensionally uses a transistor with a cylindrical column type structure (refer to Japanese Unexamined Patent Application Publication No. 2007-266143; U.S. Pat. Nos. 5,599,724; and 5,707,885). The semiconductor memory device using the transistor with a cylindrical column type structure is provided with a stacked conductive layer stacked in multiple layers and configured to form a gate electrode, and a pillar-shaped columnar semiconductor. The columnar semiconductor functions as a channel (body) portion of the transistor. A vicinity of the columnar semiconductor is provided with a memory gate insulating layer capable of storing a charge. A configuration including these stacked conductive layer, columnar semiconductor, and memory gate insulating layer is called a memory string.
To achieve conduction with a peripheral circuit in a semiconductor memory device having the above-described memory string, a contact plug is formed extending in a stacking direction (direction perpendicular to a substrate) from the stacked conductive layer. To form the contact plug, the stacked conductive layer is formed in a stepped shape. However, for reasons of limiting a number of manufacturing steps, the stacked conductive layer in a conventional semiconductor memory device has a region other than a region functioning as the memory string also formed in a stepped shape, making it difficult to reduce an occupied area of the semiconductor memory device.